About Marvell

Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, automotive, and carrier architectures, our innovative technology is enabling new possibilities. 

At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. 

Your Team, Your Impact

Central Engineering AMS-IP team provides leading-edge SerDes PHY solutions and other Analog Mixed-Signal IPs to support all Marvell products.

What You Can Expect

As ASIC design engineer you will be responsible for the design, verification, and evaluation of digital circuits in high-speed data communication ICs.You will be involved in engineering implementation spec writing from system requirements, RTL design, verification, synthesis, static timing analysis.Enhance design methodology and workflow for greater efficiency.Design RTL for various SerDes IPs with data rates from 10Gbps to 224Gbps for diverse applications.Collaborate with Analog, DSP, Digital Verification, Firmware, and Application Engineering teams to deliver competitive SerDes IP solutions across all product lines.Provide support to product teams, both pre-silicon and post-silicon.

What We're Looking For

Bachelor’s degree in Computer Engineering, Electrical Engineering and 4+ years of related professional experience, or a Master’s degree and/or PhD in Computer Engineering, Electrical Engineering or related fields with 2+ years of experience.Proficient in fundamental concepts of digital logic designKnowledgeable in digital logic timing analysisSkilled in Verilog/VHDL coding and Lint toolsExperience with MAC and PHY integrationExperience with silicon validation processesMicro-controller 8051 or ARM Cortex experienceMicro-controller firmware experienceSkilled in synthesis using Synopsys or Cadence toolsProficient in timing analysis using PrimetimeUnderstanding of Design-for-Test (DFT) concepts, including Scan and BISTStrong communication skills and effective team collaboration abilitiesMotivated and committed to contributing to a highly skilled design team

Additional Compensation and Benefit Elements

With competitive compensation and great benefits, you will enjoy our workstyle within an environment of shared collaboration, transparency, and inclusivity. We’re dedicated to giving our people the tools and resources they need to succeed in doing work that matters, and to grow and develop with us. For additional information on what it’s like to work at Marvell, visit our Careers page.

All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.

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