Applications Engineering, Staff Engineer
CoWare
An exciting opportunity to work with Synopsys with a team of IP solutions engineers for Synopsys IP products. As a part of Synopsys Solutions Group, you will work within a post-sales technical team with the following responsibilities:
Responsible for ensuring Synopsys IP products meet quality targets. You will work closely with various IP applications and R&D engineering teams to ensure smooth out-of-the-box experience for Synopsys Interface IP customers Collaborate with applications engineers to create and deliver tools and scripts that will enable them to solve a range of complex problems faster In charge of verifying the interoperability of various Synopsys IP solutions by executing various test strategies on controller and PHY integration Work on diverse range of interface IP products such as EMMC, I3C, AMBA, DDR Training customers and internal teams on IP
Some travel may be required.
Requirements:Master’s degree with 6 years of work experience Experience and understanding of RTL simulations and synthesis as part of an ASIC or FPGA design flowExperience with one or more Interface Protocols such as DDR, Ethernet, USB, PCIe, AMBA etc.Knowledge of digital design front end flow, exposure to back-end flowKnowledge of ASIC design lifecycleExcellent command over spoken and written English
Responsible for ensuring Synopsys IP products meet quality targets. You will work closely with various IP applications and R&D engineering teams to ensure smooth out-of-the-box experience for Synopsys Interface IP customers Collaborate with applications engineers to create and deliver tools and scripts that will enable them to solve a range of complex problems faster In charge of verifying the interoperability of various Synopsys IP solutions by executing various test strategies on controller and PHY integration Work on diverse range of interface IP products such as EMMC, I3C, AMBA, DDR Training customers and internal teams on IP
Some travel may be required.
Requirements:Master’s degree with 6 years of work experience Experience and understanding of RTL simulations and synthesis as part of an ASIC or FPGA design flowExperience with one or more Interface Protocols such as DDR, Ethernet, USB, PCIe, AMBA etc.Knowledge of digital design front end flow, exposure to back-end flowKnowledge of ASIC design lifecycleExcellent command over spoken and written English
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