Company:Qualcomm India Private Limited

Job Area:Engineering Group, Engineering Group > Hardware Engineering

General Summary:

NUVIA is now part of Qualcomm. Our mission is to reimagine silicon and create computing platforms that will transform the industry. You will have the opportunity to work with some of the most talented and passionate engineers in the world to create designs that push the envelope on performance, energy efficiency and scalability.

Minimum Qualifications:

• Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 6+ years of Hardware Engineering or related work experience.
OR
Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 5+ years of Hardware Engineering or related work experience.
OR
PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience.

As CPU Physical Design CAD engineer, you will build and support the world’s best implementation tools and flows. Your tools and flows will ensure our custom CPUs have industry-leading power, performance and area.

Roles and Responsibilities

Develop, integrate and release new features in our high-performance place-and-route CAD flowArchitect and recommend methodology improvements to ensure our silicon has the best power, performance and areaMaintain, support and debug implementation flows, and resolve project-specific issues Work closely with worldwide CPU physical design teams, and provide methodology guidance, tools/flows support and help achieve class-leading PPA.Work with EDA vendors to define roadmap and to resolve tool issues

Preferred Qualifications:

Bachelors/Masters degree in Electrical/Electronics Engineering or Computer ScienceTen+ years of hands-on experience in place-and-route of high-performance chips - either in a design or CAD roleHigh level of proficiency in Tcl as well as PythonExperience with automationExperience with a wide variety of Physical Design tasks - ranging all the way from place-and-route, analysis, timing sign-off and PDVExperience with advanced technology nodes (5nm or lower)Solid understanding of digital design, timing analysis and physical verificationStrong user of industry-standard place-and-route tools such as Cadence InnovusProven track record of managing and regressing place-and-route flows

Applicants: Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail myhr.support@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities.

Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law.

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If you would like more information about this role, please contact Qualcomm Careers.