**Physical Verification Engineer** As a Physical Verification Engineer, you will play a leading role in the physical design domain for developing Onsemi’s cutting edge image sensor products. You will work on the physical verification (PV) flow and chip closure activities. You need to work closely with the cross-functional teams like physical/Analog design, PDK, IP, ESD and Packaging teams in chip closure and tape-out activities. **Experience/Requirements:** + BSEE required, MSEE preferred with 2-3 years of experience in physical verification. + Expertise with industry standard CAD tools (preferably Calibre) with strong emphasis in physical verification and tape-out. + Hands-on experience in layout and schematic entry using Cadence Virtuoso with good understanding in semiconductor device physics, models and technology scaling. + Strong DRC/LVS debug experience + Self-motivated, excellent communication and interpersonal skills. + Programming skills in TCL/Perl/Skill will be a plus. L1-LK1 **onsemi** (Nasdaq: ON) is driving disruptive innovations to help build a better future. With a focus on automotive and industrial end-markets, the company is accelerating change in megatrends such as vehicle electrification and safety, sustainable energy grids, industrial automation, and 5G and cloud infrastructure. With a highly differentiated and innovative product portfolio, onsemi creates intelligent power and sensing technologies that solve the world’s most complex challenges and leads the way in creating a safer, cleaner, and smarter world. **More details about our company benefits can be found here:** https://www.onsemi.com/careers/career-benefits We are committed to sourcing, attracting, and hiring high-performance innovators, while providing all candidates a positive recruitment experience that builds our brand as a great place to work.