Job Description

Develops the logic design, register transfer level (RTL) coding, simulation, and providesDFTtiming closure support as well as test content generation and delivery to manufacturing for various DFx content (including SCAN, MBIST, and BSCAN). 

Participates and collaborates in the definition of architecture and microarchitecture features of the block, subsystem, and SoC underDFTbeing designed (including TAP, SCAN, MBIST, BSCAN, proc monitors, in system test/BIST). 

Develops HVM content for rapid bring up and ramp to production on the automatic test equipment (ATE). Applies various strategies, tools, and methods to write and generate RTL and structural code to integrateDFT. 

Optimizes logic to qualify the design to meet power, performance, area, timing, test coverage, DPM, and test time/vector memory reduction goals as well as design integrity for physical implementation. Reviews the verification plan and drives verification of theDFTdesign to achieve desired architecture and microarchitecture specifications. 

Ensures design features are verified correctly and resolves and implements corrective measures for failing RTL tests to ensure correctness of features. IntegratesDFTblocks into functional IP and SoC and supports SoC customers to ensure high quality integration of the IP block. 

Collaborates with post silicon and manufacturing team to verify the feature on silicon, support debug requirements, and document all learnings and improvements requirement in design and validation. 

Drives high test coverage through structural and specific IP tests to achieve the quality and DPM objectives of the product and develops HVM content for rapid bring up and production on the ATE.

Qualifications

You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. 

Experience would be obtained through a combination of prior education level classes, and current level school classes, projects, research, and relevant previous job and/or internship experience.  

Minimum Qualifications:

Bachelor's degree in electrical engineering, computer science or related field with 4+ years of industry experience OR

Master's degree in Electrical Engineering, computer science or related field with 3+ years of industry experience

Technical Experience:

5+ years of experience with DFT

1+ years of experience with Synopsys or Cadence tools

Preferred Qualifications:

Expertise in Tessent DFT tool

Primetime expertise, especially in DFT constraints

Requirements listed would be obtained through a combination of industry relevant job experience, internship experiences and or schoolwork/classes/research.

Inside this Business Group
The Data Center & Artificial Intelligence Group (DCAI) is at the heart of Intel’s transformation from a PC company to a company that runs the cloud and billions of smart, connected computing devices. The data center is the underpinning for every data-driven service, from artificial intelligence to 5G to high-performance computing, and DCG delivers the products and technologies—spanning software, processors, storage, I/O, and networking solutions—that fuel cloud, communications, enterprise, and government data centers around the world.

Other Locations

US, OR, Hillsboro; US, TX, Austin; US, CA, Santa Clara; US, MA, Hudson


Posting Statement
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
Benefits
We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here.



Annual Salary Range for jobs which could be performed in the US $139,710.00-$197,230.00
*Salary range dependent on a number of factors including location and experience


Working Model
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.