We are seeking a highly skilled DFT Engineer with expertise in Siemens Tessent toolchain and advanced DFT (Design for Test) methodologies. The ideal candidate will be responsible for MBIST, IJTAG, OCC, LBIST, Scan insertion, and ATPG, while ensuring high-quality structural test implementation.
Key Responsibilities:
•    DFT & Test Architecture: Design and implementation of MBIST, IJTAG, OCC, LBIST, Scan chain insertion, test point/wrapper analysis, and Streaming Scan Network from RTL to Post-Production for complex multi-million gate Computer Vision SoC.
•    Scripting & Automation: Strong experience with Tcl, Python, and object-oriented programming.
Qualifications:
•    Master’s in Electrical Engineering, Computer Engineering, or related field.
•    2+ years of experience in DFT, ATPG, and structural test methodologies.
•    Strong understanding of Logic Synthesis, Digital Design Flow, IJTAG, and Scan-based testing.
•    RTL & Verification: Verilog, SystemVerilog, UVM for digital logic design and verification.
Preferred Skills:
•    Exposure to Silicon Diagnosis, SRAM Repair, In System Test, Analog IP Testing, Clock Tree Synthesis, SDC, and STA is a plus