At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.Interfacing with customers regarding digital reference flows, includingSynthesisFloorplanningClock tree synthesisPower planningPlace and routeTiming closureCreating baseline flows to be used by customers as starting point for digital implementationPerforming digital place and route and sign-off on small customer designsCreating documentationPPA optimizationBachelor’s degree with at least 1-3 years of design/EDA experience or Master’s degree.Strong knowledge of Digital Design Fundamentals, Semiconductor Fundamentals and Static Timing AnalysisPrior experience with ASIC digital implementation flows and EDA tools is required; Experience with advanced nodes (7nm and below) preferred.Good programming knowledge in Unix, Shell scripting, perl and importantly TCLStrong customer-facing communication and problem solving skillsStrong personal drive for continuous learning and expanding professional skill setsExcellent verbal and written communication skills

Familiar with EDA tool operation, setup and debug:

Digital: Genus, Innovus, Tempus, Voltus, etcWe’re doing work that matters. Help us solve what others can’t.