Position:Engineer (DFT)

Job Description:

:- Hands on experience in various DFT aspects like Scan insertion, MBIST and JTAG, ATPG, Pattern validation at block level as well as Fullchip level
- Synopsys tools: DFT MAX, TetraMAX
OR
- Cadence tools: RTL Compiler, Encounter Test , modus, Janus
OR
- Mentor Graphics tools: Tessent tool chain, TestKompress
- Debussy, VCS/Questa/IUS
- PT tool from Synopsys

Location:IN-KA-Bangalore, India (eInfochips)

Time Type:Full time

Job Category:Engineering Services