Experienced Design Verification Engineer
Intel
**Job Description**
Intel's IPU (Infrastructure Proccessign Unit) is reinventing the data center of the future.
In this role, you will:
Develop cutting edge design verification environemnts for Intel's IPU.
Work closely with architecture/design and other teams to challenge the definitions and drive for a successful tapeout after reaching high pass-rate/coverage using constrained random verification.
Develop/Augment an environment using SV UVM and lead activity of PCIe verification invloving complex architecture and a great team.
**Qualifications**
**Minimum Qualifications:**
+ At least 5 years experience in design verification
+ 4 years UVM experience
**Preferred Qualifications:**
+ Verification leadership experience
+ Scripting language abilities
+ PCIe protocol experience (and familiarity)
**Inside this Business Group**
The Network & Edge Group brings together our network connectivity and edge into a business unit chartered to drive technology end to end product leadership. It's leadership Ethernet, Switch, IPU, Photonics, Network and Edge portfolio is comprised of leadership products critically important to our customers.
**Posting Statement**
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
**Benefits**
We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here. (https://jobs.intel.com/en/benefits)
**Working Model**
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. *** Job posting details (such as work model, location or time type) are subject to change.**
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