Graduate Talent (Memory Design)
Intel
Job DescriptionAs a Memory Design Graduate Trainee, you will be part of Intel Design Enablement (DE) focused on pathfinding and development of advanced memory technology and circuits to enable best-in-class memory collateral/IP and product design across all generations of Intel process technology.
As a member of this team, your responsibilities include (but not limited to):
Memory pathfinding activities and power performance area (PPA) optimization through design technology co-optimization (DTCO); product/design enablement
Memory bitcell and complex periphery IC layout and automation
Memory array/IP design, memory circuit innovation, testchip design/execution/validation
Pre/post-Si validation/debug to enable yield and parametric tracking/rampQualificationsMinimum Qualifications:
You should have Bachelor/Master/PhD in Electrical Engineering, Computer Engineering, Computer Science, or other related Electrical Scientific STEM field.
Proficient in TCL, Perl or Python programming language.
Unix/Linux operating system
Preferred Qualifications:
Ability to work in a fast-paced, collaborative, and often intense project schedule.
Excellent communication and interpersonal skills, a good team-player as well as able to work independently.
Creative mind and self-motivated.
Analytical problem solving and multitasking.
Able to do pathfinding or research independently to find solutions.
#designenablementInside this Business GroupAs the world's largest chip manufacturer, Intel strives to make every facet of semiconductor manufacturing state-of-the-art -- from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support. Employees in the Technology Development and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moore’s Law to bring smart, connected devices to every person on Earth.Posting StatementAll qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.BenefitsWe offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here.Working ModelThis role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.
As a member of this team, your responsibilities include (but not limited to):
Memory pathfinding activities and power performance area (PPA) optimization through design technology co-optimization (DTCO); product/design enablement
Memory bitcell and complex periphery IC layout and automation
Memory array/IP design, memory circuit innovation, testchip design/execution/validation
Pre/post-Si validation/debug to enable yield and parametric tracking/rampQualificationsMinimum Qualifications:
You should have Bachelor/Master/PhD in Electrical Engineering, Computer Engineering, Computer Science, or other related Electrical Scientific STEM field.
Proficient in TCL, Perl or Python programming language.
Unix/Linux operating system
Preferred Qualifications:
Ability to work in a fast-paced, collaborative, and often intense project schedule.
Excellent communication and interpersonal skills, a good team-player as well as able to work independently.
Creative mind and self-motivated.
Analytical problem solving and multitasking.
Able to do pathfinding or research independently to find solutions.
#designenablementInside this Business GroupAs the world's largest chip manufacturer, Intel strives to make every facet of semiconductor manufacturing state-of-the-art -- from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support. Employees in the Technology Development and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moore’s Law to bring smart, connected devices to every person on Earth.Posting StatementAll qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.BenefitsWe offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here.Working ModelThis role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.
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