About Marvell

Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, automotive, and carrier architectures, our innovative technology is enabling new possibilities. 

At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. 

Your Team, Your Impact

We are seeking a highly skilled and motivated Senior Staff IO Layout Engineer to join our Central Engineering, Foundational IP team. This team contributes to the development of General Purpose IOs (GPIO), LVDS, NANDIO, HSIO, and IO ESD solutions across different process nodes, addressing the needs of hyperscale data centers, automotive, and other advanced applications.

What You Can Expect

Own the overall layout execution of the assigned IO projectsPhysical layout and verification of high speed I/O circuits, General Purpose I/Os, ESD structures with the latest process nodes using Cadence tools.Provide technical expertise and mentoring to team membersWork effectively with various groups including layout, design, backend, frontend, ESD, packaging, CAD, etcDrive layout reviews and ensure compliance with quality standards and design rulesContribute to overall team through tool testing, script development, flow documentation, training, etcHelp with releasing I/O IP librariesKeep abreast of technology and tool developments and bring new ideas to the team

What We're Looking For

Bachelor's or Master's Degree and or PhD in Electrical/Electronic  Engineering,   Microelectronics or related fields with  9 to 14 years of related professional experienceGood understanding of custom layout best practices and layout dependent effects in lower technologyWork experience in deep sub-micron technologies, GAA ,FINFET and FDSOI technologyHands-on layout experience in GPIO, NAND IO, High-speed IOs: DDR, USB, LVDSHave high level proficiency/knowledge of industry standard EDA toolsProficiency in PDK understanding, foundry guidelines, and tape-out processHave high level proficiency in the interpretation of CALIBRE DRC, ERC, LVS, EMIR, PERC reportsProven experience leading layout teams and delivering successful tape-outsScripting skills in PERL, TCL or SKILL are considered a plusPossess strong analytical skills, creative thinking and self-motivatedExcellent communication skills and able to work with cross-functional teams.

Additional Compensation and Benefit Elements

With competitive compensation and great benefits, you will enjoy our workstyle within an environment of shared collaboration, transparency, and inclusivity. We’re dedicated to giving our people the tools and resources they need to succeed in doing work that matters, and to grow and develop with us. For additional information on what it’s like to work at Marvell, visit our Careers page.

All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.

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