At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. Cadence is a pivotal leader in electronic design, building upon more than 30 years of computational software expertise. The company applies its underlying Intelligent System Design strategy to deliver software, hardware and IP that turn design concepts into reality. Cadence customers are the world’s most innovative companies, delivering extraordinary electronic products from chips to boards to systems for the most dynamic market applications including consumer, hyperscale computing, 5G communications, automotive, aerospace industrial and health. At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. Job Title: Lead Analog Layout Design Engineer (SERDES) Location: Cork Reports to: Group Director Job Overview: The Lead Analog Layout Design Engineer will take a senior role on the PMA custom layout design team as part of a SERDES Product Team located at Cork, Ireland. Job Responsibilities: + Design of High Speed SERDES products at data rates up to and exceeding 112 Gbps on leading edge technology nodes (e.g. 3nm FinFET CMOS) + Design quality layouts of analog/mixed-signal circuit blocks, working in collaboration with circuit designers + Responsibilities include all facets of the back-end flow, from initial floor planning through detailed layout and final verification of conformance to foundry design rules + Work with Technical Team Leads in the areas of blocks layout design and PHY top levels + Mentor Junior Layout Design Engineers when the project need arises + Work with global teams (US, west coast and east coast), which work in different time-zones Job Qualifications: + Candidate’s background should include a minimum of 4 years of experience in CMOS SERDES or high-speed I/O IC layout design and development + Excellent layout design experience in some of the following SERDES circuit blocks: Driver, Receiver, Serializer, Deserializer, Phase Interpolator, Low jitter PLL, High Speed Clock Distribution, Bias and Bandgap, Voltage Regulators + Implementing high speed and high accuracy cells, blocks and IP blocks in a timely fashion with high quality and efficiency + Assist with the architecture and implementation of complete PHY gds with integration of PMA, PCS hierarchies and optimized clock and power distribution strategies + Working with custom layout designers from groups all over the world to build high quality IP and test chips + Working with circuit designers and project managers from groups all over the world to understand their technical and schedule needs + Excellent problem-solving skills, analog aptitude, good communication skills and ability to work cooperatively in a team environment + BEng, MEng or PhD Additional Skills/Preferences: + Cadence tool experience and design experience at >10Gbps and in <40nm technologies + Collaborating with the Cadence R&D teams (Virtuoso, PVS developers) to help develop the layout editing and verification tools Additional Information: Cadence is committed to equal employment opportunity and employment equity throughout all levels of the organization. We strive to attract a qualified and diverse candidate pool and encourage diversity and inclusion in the workplace. Travel: >10% We’re doing work that matters. Help us solve what others can’t. Additional Jobs (https://cadence.wd1.myworkdayjobs.com/addl\_jobs) Cadence plays a critical role in creating the technologies that modern life depends on. We are a global electronic design automation company, providing software, hardware, and intellectual property to design advanced semiconductor chips that enable our customers create revolutionary products and experiences. Thanks to the outstanding caliber of the Cadence team and the empowering culture that we have cultivated for over 25 years, Cadence continues to be recognized by Fortune Magazine as one of the 100 Best Companies to Work For. 
Our shared passion for solving the world’s toughest technical challenges, our dedication to pushing the limits of the industry, and our drive to do meaningful work differentiates the people of Cadence. Cadence is committed to creating a diverse environment and is proud to be an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to race, color, sex, age, national origin, religion, sexual orientation, gender identity, status as a veteran, basis of disability, or any other protected class. Cadence is committed to creating a diverse environment and is proud to be an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to race, color, sex, age, national origin, religion, sexual orientation, gender identity, status as a veteran, basis of disability, or any other protected class.