At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

This is an opportunity to join a development team designing state-of-the-art DDR memory controllers to be used in a wide range of applications including Datacenter, Edge computing, Automotive, and AI.  Cadence is a leading provider of IP solutions for the biggest names in the technology industry.  As a member of our team you will have the following responsibilities:

Architect solutions for the latest DDR controller features and customer requirementsDesign RTL in a highly configurable and automated environmentWork in small project teamsWork across disciplines with Design Verification, Support, Delivery, Application Engineers, PHY design team, etc.Utilize Cadence’s Design Automation flow and IP development toolsDevelop high speed circuits and low power featuresImprove quality and efficiency and help refine development process for greater productivity of the team through automation and improved methodsParticipate in an engineering team to advance our product

Required Experience & Qualifications

BSEE or MSEE and minimum of 5 years of experience requiredBackground in RTL design including Verilog, synthesis, lint, formalStrong communication skillsScripting language experience a plusWe’re doing work that matters. Help us solve what others can’t.