Siemens EDA is a global technology leader in Electronic Design Automation software. Our software tools enable companies around the world to develop highly innovative electronic products faster and more efficiently. Our customers use our tools to push the boundaries of technology and physics to deliver better products in the increasingly complex world of chip, board, and system design.
Aprisa offers complete functionality for top-level hierarchical design and block-level implementation for complex digital IC designs.
The detail-route-centric architecture and hierarchical database enable fast design closure and efficient quality of results at a driven runtime.
This role is based in Bangalore. But you’ll also get to visit other locations in India and globe, so you’ll need to go where this job takes you. In return, you’ll get the chance to work with teams impacting entire cities, countries, and the shape of things to come.
This is your role:Working on 7nm and 5nm designs with various customers for deployment of Aprisa place and route tools.Are you expertised in solving customer's problems for critical designs to achieve desired performance, area and power targets!Responsible to develop flow and methodology for doing placement, CTS and routing. Also, provide training and technical support to customers using Aprisa toolsWe don’t need superheroes, just superminds!Typically requires minimum of 1-2 years of experience in Physical Design with mainstream P&R toolsWe are looking for someone with hands on experience in Physical Design (floorplan, placement, CTS and routing) and timing closure of complex blocks and/or Full Chip designs.Hands-on experience with commercial place & route tools like Synopsys-lCC2, Cadence-Innovus or Aprisa is a must.Tapeout experience of 2 or more projects is a must.Do you have good understanding of timing, power and area trade-offs?Ability to pickup new flows, learn on the job and influence QOR is a must.We are looking for an experienced design delivering with multiple voltage islands and top-level floor-planning & chip-assembly is a plus.Strong verbal and written communication skills; good presentation skills; good problem solving and debugging skills.Education:BE/B.Tech in Electronics and Communication (E&C) or Electrical or Telecom EngineeringME/M.Tech in VLSI or Microelectronics is a plus#LI-EDA#LI-HYBRID
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