Role Proficiency:

Independently manage customer projects and guide team members technically in any field of VLSI Frontend Backend or Analog design

Outcomes:

     Own any one or more tasks of the projects inRTL Design/Module Verification/PD/DFT/Circuit Design/Analog Layout/STA/Synthesis/Design Checks/Signoff etc.      Drive the project team to complete the assigned tasks successfully and on-time in the domain(s)      Lead the efforts to build a project plan and assign tasks to other leads and engineers      Lead the team to automate the design tasks flows and write scripts to generate reports      Anticipate diagnose and resolve problems; coordinating as necessary with cross-functional teams      Own the on-time quality delivery approved by the project manager / client      Define the tasks of the team members and track them for successful delivery      Lead by example to write paper(s) file patent(s) and devise new design approaches      Come up with novel ideas to reduce time and cost of design cycle

Measures of Outcomes:

     Quality of Projects delivered as measured by UST Manager/Client using relevant metrics      Schedule adherence to projects/tasks      Reduction in cycle time cost using innovative approaches      Number of white papers published      Number of patents filed Compliance with mandatory trainings; meeting training goals set by manager

Outputs Expected:

Technical Skills:

Guide the team technically when needed

Quality of the deliverables:

Bugs present in the design / circuit design. Zero bug is expected from the client Clean delivery of the design/module in-terms of ease in integration at the top level Drive functional spec / design guidelines 100% without any deviation or limitation Lead the efforts of documentation of the tasks / work done

Timely delivery:

Meeting project timelines as specified by the client or program manager Meeting intermediate delivery task to ensure other team members make progress Calling out for help and support in the event of delay in tasks delivery

New Skills development:

Participate in training - by helping to upgrade others skills and getting skilled in newer technologies Take up new areas of project development
learn on the job and deliver

Team Work:

Drive team work and supporting team members at the time of need Able to take on additional tasks in-case any team member(s) is not available Able to hand hold other team members to support and explain the project tasks for delivery Disciplined work approach; able to follow the design / site guidelines Get along with the team and support team members at the time of need Work dedication going beyond the call of duty to ensure deadlines and quality are met

Innovation & Creativity:

Automating tasks to save design cycle time on repetitive processes Drive technical discussion
training
forum
white paper or patent filing

Skill Examples:

     Languages and Programming skills:a.     System Verilog Verilog VHDL UVM C C++ Assembly Perl TCL/TK Makefile Spice      EDA Tools: a.     Cadence Synopsys Mentor tool sets (any one or more)b.     Simulators Lint CDC/RDC DC/RTL-C ICC/Innovus/Olympus ETS/TK/FS PT/Tempus Calibre etc. (any one or more tools exp)      Technical Knowledge:a.     IP Spec Architecture Design Micro Architecture Functional Spec Test Plan Verificationb.     Bus Protocol AHB/AXI/PCIe/USB/Ethernet/SPI/I2C Microprocessor architecturec.      Strong Physical Design / Circuit Design / Analog Layout Knowledged.     Synthesis DFT Floorplan Clocks P&R STA Extraction Physical Verificatione.     Soft / Hard / Mixed Signal IP Design Processor Hardening FPGA Design      Technology: CMOS FinFet FDSOI - 28nm / 22nm / 16ff / 10nm and below      Strong leadership skills to drive the team to success      Strong communication skills and ability to interact with team members and clients equally      Strong analytical reasoning and problem-solving skills with attention to details      Ability to understand the standard specs and functional documents      Ability to deliver the tasks on-time per quality guidelines and GANTT   Must have previously successfully completed one or more projects in the same domain   Required technical skills and prior design knowledge to execute the assigned tasks Ability to learn new skills in-case required technical skills are not present to a level needed to execute the project

Knowledge Examples:

     Have performed project(s) in any of the design by executing – RTL Design / Verification / DFT / Physical Design / STA / PV / Circuit Design / Analog Layout etc.      Well versed and able to efficiently utilize the available EDA tools Understanding of the design flow and methodologies used in the designing      Must have completed projects in the same technical domain earlier in his/her career Understand the assigned tasks and have sufficient knowledge to execute the project tasks assigned by the client / manager as per known skills

Additional Comments:

Candidate should work independently on block level and chip level Analog layout design, coordinating with the circuit designer & the project lead. Candidate should have minimum 9+ years of hands-on experience in Analog layout. Custom layout experience in DAC, ADC, Band gap, Regulators, LDOs etc. Knowledge of finfet or technology exposure to 7nm ,5nm or below is an added advantage. Full Understanding of IC fabrication and reliability issues. Full familiarity with Cadence-Virtuoso, PVS, ASSURA and Calibre tools. Outstanding written and verbal communication skills.