Kforce's client, a growing and established Semiconductor Company in the Austin, TX area, is seeking a Senior Analog IC Layout Designer. Summary: The company offers a competitive compensation package including base salary, profit sharing and stock/RSU's. We have been working with this client for many years and have placed numerous engineers there over the years. We are working directly with the Hiring Manager on this search assignment. The Senior Analog IC Layout Designer will work closely with circuit designers to generate topological custom layouts of high-performance, cutting-edge IC products. This position is hybrid remote (2 days in office & 3 days from home). This candidate must reside in the Austin, TX area, but the client is open to out of state candidates willing to relocate to the Austin, TX area. Responsibilities will include: * The Senior Analog IC Layout Designer will work closely with circuit designers to complete the custom physical layout and verification of high-performance analog/mixed-signal CMOS Integrated Circuits using Cadence Virtuoso XL Layout and PVS Verification tools in FinFET technologies * Use problem solving skills, experience, and creativity to layout circuits that meet size, schedule, and performance specifications while meeting FinFET technology rules * Run physical design verification tools to debug, improve, and verify layout blocks * As a Senior Analog IC Layout Designer, you will collaborate with fellow team members on continuous improvement opportunities in the flow, layout techniques, and design methodologies