About Marvell

Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, automotive, and carrier architectures, our innovative technology is enabling new possibilities. 

At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. 

Your Team, Your Impact

Marvell's Optical and Copper Connectivity Business Unit is the industry leading provider of infrastructure solutions to enterprise, data center, service providers, small business, and digital home customers.

The ODSP team is a key part of Optical and Copper Connectivity Business Unit that drives key design wins for 50G-PAM4, 100G-PAM4, up to 800G-PAM4 DSP products.

At Marvell, everyone has an important role to play in changing the way tomorrow’s enterprise, cloud, automotive, and carrier architectures transform—for the better.
We move, store, process and secure the world’s data with semiconductor solutions designed for our customers’ current needs and future ambitions.

What You Can Expect

RTL coding using Verilog or SystemVerilogPerform functional verification of design on block and system level.Perform logic synthesis at sub-system or top level for multi-million gate ASIC projectsPerform RTL Lint, CDC, LEC and design ECOPerform STA signoff, timing ECOWork with logic design and PnR engineers on logic, timing, power and physical issues.Manage schedules and support cross-functional engineering effort.Implement, enhance and maintain Synthesis, STA scripts and various automation flows.Contribute to the continuous development of IC design flow

What We're Looking For

BS/MS in Electrical Engineering/Computer Engineering, or related fields and 3-5 years of experience in digital design with knowledgeStrong Knowledge of logic synthesis, STA Familiarity of ASIC design flow (FrontEnd, DFT, PnR)Hand-on experience on any of RTL coding, constraint developing, logic synthesis, timing closure  : Experiences in commercial implementation tools for logic synthesis (DC, Genus), LEC (Formality, Conformal), STA (PrimeTime, Tempus)Strong Programming Skills in Scripting/programming language like PERL/Python, TCL & C/C++, in a Unix type environment.Strong problem solving skills, analytical skill.Strong written and verbal communication English skills.Self-motivated and excited to learn new skills, tools, IP, and design flows.Understanding any of these knowledge is a plus:

- Design verification

- SERDES, Data Communication, Communication Standards (IEEE, Ethernet protocols)

- DFT experience

Additional Compensation and Benefit Elements

With competitive compensation and great benefits, you will enjoy our workstyle within an environment of shared collaboration, transparency, and inclusivity. We’re dedicated to giving our people the tools and resources they need to succeed in doing work that matters, and to grow and develop with us. For additional information on what it’s like to work at Marvell, visit our Careers page.

All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.

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