Job Requirements

Job Responsibility

Knowledge of Code coverage using features in existing simulators or stand-alone tools like Surecov, HDL score etc.Working on full chip verification and OVM/UVM Methodology, System Verilog is a must with 3+years of recent work experience, worked on passing test cases, test benches, Building environment.Knowledge of Functional coverage using HVL language features or assertions a plus.Should be ARM based SoC verification only. No need to mention tools.Proficiency in one scripting language like Perl, C++, Python, Unix Make, Unix Shell Scripts etc.

 

Desired Skills & Experience:

Experience level 3 to 5 years.Strong domain knowledge on one or more - PCIe,USB, Ethernet, ARM, AHB/AXI, AMBA, Networking, CPU, ARM, Graphics (DDR, PCIE, USB)Should have worked on SOC verification on at least one project with constrained random methodology (OVM/UVM).Good in concepts Code coverage and functional coverage.Expertise in Verilog and / or VHDL is desired.Strong in SV & OOPSIP or SoC verificationFunctional + code coverageARM based SoC verificationCapable of developing C testsWorking knowledge – SV/METHCode coverage

 

Education: B.Tech/B.E., in Electronics/Telecommunication, Electrical) OR (PG - M.Tech/M.E, in (Electrical, Electronics/Telecommunication)