Santa Clara, CA, USA
90 days ago
Senior Hardware Validation Engineer

Our technology has no boundaries! NVIDIA is building the world’s most groundbreaking and state of the art compute platforms for the world to use. It’s because of our work that scientists, researchers and engineers can advance their ideas. At its core, our visual computing technology not only enables an amazing computing experience, but it is also energy efficient! We pioneered a supercharged form of computing loved by the most demanding computer users in the world - scientists, designers, artists, and gamers. It’s not just technology though! It is our people, some of the brightest in the world, and our diverse company culture make NVIDIA one of the most fun, innovative and dynamic places to work in the world! At the center of NVIDIA's culture are our core values like innovation, excellence and determination and team, that guide us to be the best we can be.


We are looking for a Senior Hardware Validation Engineer to lead validation activities in the Datacenter Systems Engineering team. You'll work closely with validation engineers, board designers, silicon characterization, and AE teams to ensure product validation and test coverage are optimal. The ideal candidate is self motivated, works well with different teams, very comfortable in a lab environment and demonstrates passion towards product level validation. They should have strong debug/circuit analysis fundamentals as well as automation and scripting experience. They must be capable of thriving in fast paced environment with evolving product definitions.


What you’ll be doing:

Design and develop validation plans for GPU and CPU modules, and other peripheral cards that get integrated into NVIDIA's datacenter products.

Debug, triage issues, perform root cause analysis, verify fixes, define new tests, and improve product test plans.

Electrical, functional and stress testing of all interfaces such as power monitoring control loop, I2C, SPI, SMBUS, PCIe, and USB.

Track and coordinate all validation activities from bringup to production release.

Collaborate with multi-functional teams including designers, Silicon, SW, thermal leads to test and debug any HW/SW product issues.

Design diagnostic suites test plans for engineering builds.

Provide schematic and layout reviews on next generation board designs.


What we need to see:

BSEE/BSCE or equivalent experience

5+ years of validation experience

Strong understanding of digital design, circuit design and analysis, computer architecture and CPU/GPU architecture.

Validation experience with board bringup, lab debug and lab tools (oscilloscopes, multimeters, logic analyzers).

Programming skills with experience in Python or other scripting languages (such as Perl, Shell).

Experience with ARM CPU architecture and hardware validation.

Excellent design, debugging and problem-solving skills, with a strong bias for action, quality and engineering excellence.


Ways to stand out from the crowd:

Validation experience with CPU/GPU/SOC products.

Knowledge of control systems, PID tunings and power transistor fundamentals

Experience with test automation and developing scripts to improve validation efficiency

Highly motivated and able to thrive in a fast pace environment.

Strong interpersonal skills, including written and verbal communication.

The base salary range is 128,000 USD - 247,250 USD. Your base salary will be determined based on your location, experience, and the pay of employees in similar positions.

You will also be eligible for equity and benefits. NVIDIA accepts applications on an ongoing basis.

NVIDIA is committed to fostering a diverse work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.

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