Job Description

Performs functional verification of IP logic to ensure design will meet specification requirements.

Develops IP verification plans, test benches, and the verification environment to ensure coverage to confirm to microarchitecture specifications.

Executes verification plans and defines and runs system simulation models to verify the design, analyze power and timing, and uncover bugs.

Replicates, root causes, and debugs issues in the pre-silicon environment.

Finds and implements corrective measures to resolve failing tests.

Collaborates with architects, RTL developers, and physical design teams to improve verification of complex architectural and microarchitectural features.

Documents test plans and drives technical reviews of plans and proofs with design and architecture teams.

Maintains and improves existing functional verification infrastructure and methodology.

Participates in the definition of verification infrastructure and related TFMs needed for functional design verification.

In Q4 2023, Intel announced PSG will be reported as a separate business unit beginning on January 1, 2024 with ongoing support from Intel. This position is associated to that standalone business strategy and is expected to fully transition to a standalone company at some time in the future.

Qualifications

Bachelor or higher of Science degree in Electronics Engineering, Computer Engineering or equivalent with at least 7 years of relevant work experience.

Good coding skills on System Verilog, familiar with OVM/UVM methodologies and Perl Script.

Python is an added advantage.

Passionate to apply hardware and software engineering skillset to push verification, validation and regression testing to next efficiency level

Good problem-solving skills and a self-starter.

Hands-on experience with hardware and software debugging tools.

Ability to comprehend content of technical specifications for architecture, microarchitecture, registers, and schematic.

Highly motivated to learn IP architecture and new verification tools/flow/methodology and adapt to fast-changing technologies and environments.

Effective communication and collaboration skills.

Ability to work effectively in a cross-site team environment.

Experience with either SCAN/ATPG/IJTAG/MBIST relevant test verification or major industrial standard I/O interfaces such as PCIe/USB/Ethernet/AXI/AHB/APB is a plus

Inside this Business Group
The Programmable Solutions Group (PSG) was formed from the acquisition of Altera. As part of Intel, PSG will create market-leading programmable logic devices that deliver a wider range of capabilities than customers experience today. Combining Altera's industry-leading FPGA technology and customer support with Intel's world-class semiconductor manufacturing capabilities will enable customers to create the next generation of electronic systems with unmatched performance and power efficiency. PSG takes pride in creating an energetic and dynamic work environment that is driven by ingenuity and innovation. We believe the growth and success of our group is directly linked to the growth and satisfaction of our employees. That is why PSG is committed to a work environment that is flexible and collaborative, and allows our employees to reach their full potential.


Posting Statement
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
Benefits
We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here.


Working Model
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.