Job Description
About Operations Engineering Division (OED): OED is the central team that supports all Business Unit Design and Development teams, and other organizations including Sales, Marketing, Business Operations, Foundry Operations, and Test. OED provides a platform for managing all process technology and PDK development for both Internal and External Foundry processes. This strong and highly qualified team (mostly MS/PhD) add strength in developing Test Technology, Foundry Operations, and Yield management. The team’s world class contributions lead to aggressive NPI strategies and continual cost and gross margin improvement.
Duties and Responsibilities:
The tape-out process is an important transition point from R&D into Manufacturing. The Tape-out Sr. manager is responsible for managing the tape-out process for semiconductor products, ensuring successful delivery to foundries consistent with Renesas manufacturing requirements. This role involves coordinating with various teams including design, process, legal and manufacturing to ensure that the final design is ready for production. The tape out manager will lead the efforts in finalizing the tape-out requirements, maintaining tape-out forecast and KPI reports to ensure compliance with Renesas technology roadmap, managing risks, and ensuring that all technical and logistical aspects are handled efficiently.
Key Responsibilities:
Project Management: Lead and manage the tape-out process for multiple projects, ensuring all deadlines are met and deliverables are of the highest quality. Coordinate with Business Unit tape out responsible individuals to update tape-out forecast on timely manner. Forecast tape-out forecasts to foundries on regular basis.Collaboration: Work closely with design / PE/PM and process technology teams to ensure smooth transition from design to manufacturing. Work closely with legal team to prepare export forms. Work closely with SCM team to ensure the POs in place for mask making and proto wafers.Risk Management: Identify and mitigate risks associated with tape-out processes, including timeline delays, and manufacturing challenges. Coordinate DRC / DFM violation waiver discussions with foundries and be part of the waiver sign-off team. Release masks to production.Process Optimization: Continuously improve tape-out methodologies and workflows to enhance efficiency and reduce time-to-market.Documentation: Ensure all tape-out documentation is complete, accurate, and up to date, including MT form upload to Renesas internal database, Foundry Part numbers, photo maps and reticle maps.Coordination: Interface with foundries and other external vendors to ensure that tape-out requirements are clearly communicated and met and fill out Foundry service request form.Quality Assurance: Implement and oversee quality control measures to ensure that all tape-outs meet the required standards and specifications.Proto wafer and mask management: Ensure proto wafers and masks are delivered on time. Coordinate with BUs to clarify proto wafer plans (including corner plan, pilot lot requirements etc.) and manage the WIP and inventory.Reporting: Prepare and present detailed reports on tape-out progress, risks, and outcomes to senior management.
Education / Experience Requirements
Education: Bachelor’s or Master’s degree in Electrical Engineering, Physics, or a related field.Experience: Minimum of 7-10 years of experience in semiconductor design or other disciplines, with at least 3-5 years in a tape-out management or similar role.Technical Skills: Proficiency in EDA tools (e.g., Cadence, Synopsys), DFM (Design for Manufacturability) methodologies, and an understanding of semiconductor process technologies.Logistic management skills: Familiar with foundry tape out forms and has hands on experience on working on these. Able to track and manage proto wafer WIP and inventory.Leadership: Proven ability to lead cross-functional teams and manage complex projects with tight deadlines.Communication: Strong communication and interpersonal skills, with the ability to interface effectively with both technical and non-technical stakeholders.Problem-Solving: Excellent analytical and problem-solving skills, with a strong attention to detail.Vendor Management: Experience working with foundries and external vendors in a technical capacity.
Qualifications
Advanced Degree: Master’s or Ph.D. in a relevant field.Industry Certifications: Relevant certifications in project management or semiconductor technologies.Global Experience: Experience managing tape-outs with global teams and foundries.
Additional Information
Renesas is an embedded semiconductor solution provider driven by its purpose ‘To Make Our Lives Easier.’ As the industry’s leading expert in embedded processing with unmatched quality and system-level know-how, we have evolved to provide scalable and comprehensive semiconductor solutions based on the broadest product portfolio, including High Performance Computing, Embedded Processing, Analog & Connectivity, and Power.
With a diverse team of over 21,000 professionals in more than 30 countries, we continue to expand our boundaries to offer enhanced user experiences through digitalization and usher into a new era of innovation. We remain agile and fearless as we accelerate our growth, encouraging everyone to play an active role with an entrepreneurial mindset and accountability.
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Renesas Electronics is an equal opportunity and affirmative action employer, committed to celebrating diversity and fostering a work environment free of discrimination on the basis of sex, race, religion, national origin, gender, gender identity, gender expression, age, sexual orientation, military status, veteran status, or any other basis protected by federal, state or local law.