About Marvell

Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, automotive, and carrier architectures, our innovative technology is enabling new possibilities. 

At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. 

Your Team, Your Impact

As an Analog IC Design Principal Engineer with Marvell, you’ll be a member of the Central Engineering business group. If you picture Marvell as a wheel, Central Engineering is the center hub providing IP to be used by all the other spokes on that wheel, including Automotive, Storage, Security, and Networking. You’ll be part of a small analog team making a big impact on this organization. Additionally, Marvell has the perfect size and scale for you to learn several aspects of engineering that will be new to you, but also have the time and freedom to dive deep into the details of your specialization on most projects.

What You Can Expect

The candidate will be leading the high-speed and high performance SerDes development in advanced technology nodes, 5nm, 3nm, 2nm and beyond.

Design IP that includes but not limited to 224G/112G/56G PAM4; 32G PAM2; Die-to-Die High Speed Interconnect; System PLL IPs; General Analog Circuits

Participate the SerDes architecture development with the DSP, Analog and Digital design teams.

Provide the instructions to the layout engineers.

Working with the AE for the IP characterization and validation plan.

Supporting IP Lab characterization and debugging.

Product and customer supporting.

What We're Looking For

Master’s degree with 5+ years of experience and/or PhD in Electrical Engineering with 3+Experience in high speed analog mixed signal design in 7nm and below for TSMC process.PAM4, 56G, 112G and 224G SerDes Design experience highly desiredDemonstrable knowledge of high performance SerDes developmentDemonstrable team player and works well in a collaborative environmentProject leading and SOC support is preferredStrives to make others better

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Expected Base Pay Range (USD)

140,350 - 210,200, $ per annum

The successful candidate’s starting base pay will be determined based on job-related skills, experience, qualifications, work location and market conditions. The expected base pay range for this role may be modified based on market conditions.

Additional Compensation and Benefit Elements 

At Marvell, we offer a total compensation package with a base, bonus and equity.Health and financial wellbeing are part of the package. That means flexible time off, 401k, plus a year-end shutdown, floating holidays, paid time off to volunteer. Have a question about our benefits packages - health or financial? Ask your recruiter during the interview process.

All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.

Any applicant who requires a reasonable accommodation during the selection process should contact Marvell HR Helpdesk at TAOps@marvell.com.

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