At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.12+ years of experience in ASIC designProficient in Verilog coding, RTL design and complex control path and data path designsKnowledge of any of the interface Protocols like UCIe, PCIe, USB, MIPI(DPHY), HDMI/Display, Ethernet, SATAKnowledge of RTL checks ex- LINT, SDC, CDC Familiar with synthesis flow, LEC and timing constraintsExperience in writing Verilog testbench and running simulations.We’re doing work that matters. Help us solve what others can’t.