Company:Qualcomm Technologies, Inc.Job Area:Engineering Group, Engineering Group > ASICS Engineering
General Summary:
As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives communication and data processing transformation to help create a smarter, connected future for all.
The team is responsible for the complete verification lifecycle, from system-level concept to tape out and post-silicon support. The responsibility of the position involves comprehensive pre-silicon test planning for system interop verification which includes peripheral IP's such as CXL controller, PCIe controller, Coherent Interconnects, its testbench development using the advanced verification methodology such as SystemVerilog-UVM, coverage development, assertion model development and formal verification (property checking). Involve in developing automation to improve verification efficiency.
Qualifications
Bachelor's degree in Electrical Engineering or Computer Engineering or Computer Science Engineering, or a closely related field.
Master's degree in either Electrical Engineering or Computer Engineering or Computer Science or a closely related field is preferred
5+ years of experience with ASIC design and verification tools, techniques, and methodology
Preferred Qualifications
Master’s degree in Computer Science, Electrical Engineer, Computer Engineering, or a closely related field
5+ years of experience with ASIC design and verification tools, techniques, and methodology
5+ years of experience with digital design concepts and RTL languages such as SystemVerilog or Verilog, or VHDL.
Strong understanding of computer architecture fundamentals, Object-oriented programming concepts and C or C++ programming skills.
5+ years of experience with developing either SoC level or Sub-system level or Block-level testbench environment using SystemVerilog
5+ years of experience with verification methodologies such as UVM or OVM or similar methodologies.
Experienced in developing IP or Subsystem level or SoC level test planning
Understanding of PCIe and/or CXL protocol and experienced in PCIe and/or CXL controller verification or any other similar peripherals is preferred
Knowledge in coherency and understanding of ARM CHI protocol is preferred but not mandatory
Knowledge or experience with Assertion Based Formal Verification is desirable but not mandatory
Minimum Qualifications:
• Bachelor's degree in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience.OR
Master's degree in Science, Engineering, or related field and 3+ years of ASIC design, verification, validation, integration, or related work experience.
OR
PhD in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience.
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Pay range and Other Compensation & Benefits:
$140,000.00 - $229,800.00The above pay scale reflects the broad, minimum to maximum, pay scale for this job code for the location for which it has been posted. Even more importantly, please note that salary is only one component of total compensation at Qualcomm. We also offer a competitive annual discretionary bonus program and opportunity for annual RSU grants (employees on sales-incentive plans are not eligible for our annual bonus). In addition, our highly competitive benefits package is designed to support your success at work, at home, and at play. Your recruiter will be happy to discuss all that Qualcomm has to offer – and you can review more details about our US benefits at this link.
If you would like more information about this role, please contact Qualcomm Careers.