Company:Qualcomm Canada ULC

Job Area:Engineering Group, Engineering Group > ASICS Engineering

General Summary:

QUALCOMM is the world's leading developer of next-generation wireless and multimedia technology.

We are searching for an ASIC design engineer interested in developing world-class solutions for the next generation of AI/ML HW IP.

Minimum Qualifications:

• Bachelor's degree in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience.
OR
Master's degree in Science, Engineering, or related field and 3+ years of ASIC design, verification, validation, integration, or related work experience.
OR
PhD in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience.

Principal Duties:

Develop of Micro-Architecture and specification based on high level design requirementsDevelop RTL design that meets required performance and is optimized for Area and PowerIntegrate pre-verified sub-IPs to build up larger functionalityFlow bring up and report analysis for Linting, RTL Synthesis, CLP, CDCWork closely with verification team to define testplan, debug regression, analyze coverage reportsDevelop SVA assertions for white box verification for formal verificationEffective communication across teams, multitasking and well-planned execution of the tasks.

Preferred Qualifications:

Prior experience delivering Verilog and System Verilog RTLDetail oriented with strong analytical and debugging skillsStrong communication (written and verbal), collaboration, and specification skillsPracticed design knowledge working with some of the following concepts:Clock domain crossing and reset architectureMachine Learning HW developmentFIFOs implementationBus implementation/verification techniquesMemory selection and controlHigh speed and low power design optimizationBus interface protocols (AHB, AXI)Experience with some of the followingSimulation and code coverage tools (VCS, Verdi, Modeltech/Questa, or Xcelium)Design rule and CDC checking (SVA assertions, Spyglass, 0-in, etc.)Scripting languages (PERL, Python, TCL, C, etc.)Power Intent and Analysis: UPF, CLP, PTPX, PowerProSynthesis: DCG/NXT, FCStatic Timing: PrimetimeFormal Verification: Conformal, Formality

Minimum Qualifications:

Legally permitted to work on-site in Canada5+ years of ASIC design, verification, or related work experience.

Applicants: Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries).

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If you would like more information about this role, please contact Qualcomm Careers.