We are seeking someone with strong experience developing Random Instruction Sequence (RIS) tools to join our RIS engine team. The team focuses on improving our internal RIS tools and supporting the needs of the wider CPU verification team on our RISC-V products. We are building a software-first solution, and creating an environment where the output of the RIS tools can be measured independently from running on RTL, to enable fast development of new features and improvement of test coverage.