At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

Job Responsibilities:

Maintain the verification test bench and test templateMaintain the testing flows and regression frameworkDefine and manage verification/test plansCreate the reference models of DSP instructions and acceleratorsDebug the DSP instruction and accelerator tests and collaborate with design engineersAnalyze the functional and code coverage

Job Qualifications:

Master degree in CS/CE, EE, Telecom or equivalentStrong knowledge of computer architectureProficiency in programming languages like C/C++, assembly, VerilogFamiliar with scripting languages like Perl, MakefileFamiliar with design verification methodologySelf-motivated with excellent planning, interpersonal, and communication skillsExcellent oral and written English

Addition Skills

Familiar with SystemC or SystemVerilogFamiliar with UVMProcessor design/verification experience is highly desirableWe’re doing work that matters. Help us solve what others can’t.