Bangalore, India
15 days ago
Senior Engineer I - Design

Are you looking for a unique opportunity to be a part of something great? Want to join a 20,000-member team that works on the technology that powers the world around us? Looking for an atmosphere of trust, empowerment, respect, diversity, and communication? How about an opportunity to own a piece of a multi-billion dollar (with a B!) global organization? We offer all that and more at Microchip Technology, Inc.

People come to work at Microchip because we help design the technology that runs the world. They stay because our culture supports their growth and stability. They are challenged and driven by an incredible array of products and solutions with unlimited career potential. Microchip’s nationally-recognized Leadership Passage Programs support career growth where we proudly enroll over a thousand people annually. We take pride in our commitment to employee development, values-based decision making, and strong sense of community, driven by our Vision, Mission, and 11 Guiding Values; we affectionately refer to it as the Aggregate System and it’s won us countless awards for diversity and workplace excellence.

Our company is built by dedicated team players who love to challenge the status quo; we did not achieve record revenue and over 30 years of quarterly profitability without a great team dedicated to empowering innovation. People like you.

Visit our careers page to see what exciting opportunities and company perks await!

Job Description:

Develop micro architecture, design digital IPs and integrate them on microprocessor based SoCsDevelop synthesizable models for certain IPs to speed up emulation deployment for a design.Integration of various IP and 3rd Party IP in the SoC and performing FPGA synthesis and timing analysis.Debug complex issues at full chip levelParticipate in a global team setting on the development of advanced microcontroller products.

Requirements/Qualifications:

Bachelor’s degree or higher with Electronics in your course work8 to 10 years of RTL/Digital Design experience in complex IP/SubSystem/SoCs.Strong understanding of SOC design methodology & related flows.Experience in micro-architecture and hardware interfacing with the understanding of high-speed communication interfaces (SPI, UART, I3C, Ethernet).Hands-on experience on SoC Design (SoC integration, Peripherals, Bus Design, RTL Coding (Verilog/VHDL), CDC, LINT)Experience with implementing SoC/IP-based embedded systems on Xilinx FPGA and working with Vivado block design.Hands on with lab FPGA debug methodologies, such as ChipScope, SignalTap or others.Experience with verification methodologies, RTL and gate level simulations and debug.Experience with software/firmware verification with test benches to verify design logic.Strong debugging skills and experience in analyzing and resolving issues.Collaborating with cross-functional teams to achieve project milestones

Travel Time:

0% - 25%
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