Are you looking for a unique opportunity to be a part of something great? Want to join a 20,000-member team that works on the technology that powers the world around us? Looking for an atmosphere of trust, empowerment, respect, diversity, and communication? How about an opportunity to own a piece of a multi-billion dollar (with a B!) global organization? We offer all that and more at Microchip Technology, Inc.

People come to work at Microchip because we help design the technology that runs the world. They stay because our culture supports their growth and stability. They are challenged and driven by an incredible array of products and solutions with unlimited career potential. Microchip’s nationally-recognized Leadership Passage Programs support career growth where we proudly enroll over a thousand people annually. We take pride in our commitment to employee development, values-based decision making, and strong sense of community, driven by our Vision, Mission, and 11 Guiding Values; we affectionately refer to it as the Aggregate System and it’s won us countless awards for diversity and workplace excellence.

Our company is built by dedicated team players who love to challenge the status quo; we did not achieve record revenue and over 30 years of quarterly profitability without a great team dedicated to empowering innovation. People like you.

Visit our careers page to see what exciting opportunities and company perks await!

Job Description:

As a member of Microchip’s engineering community, your primary responsibility will be to verify ASIC implementations for timing and ASIC Design Audits (Lint, CDC, DFT, etc.)  at the block and full chip level.

Duties & Responsibilities:

General ASIC development

Participate in the RTL implementation, synthesis, formality check as well as ECOsSupport post-layout timing closure and verification

Detailed ASIC Back-End Development

Support the design team to develop Block / Full Chip Level Constraints, verify timing constraints with industry standard tools and run synthesis.Support LINT, clock-domain crossing, and reset-domain-crossing analysis.Perform Static Timing Analysis both pre-layout and post-layout.Support any Timing of Functional ECOs as needed.

Requirements/Qualifications:

Strong Experience in RTL design, design verification, synthesis (Genus experience strongly preferred) & formal verificationStrong Experience in Tempus  and Verilog simulation toolsStrong Experience in LINT, CDC, and RDC (SpyGlass experience strongly preferred )Able to write clean, readable presentationsSelf-motivated, proactive team playerAbility to work to schedule requirements

Education Required

Bachelors/Master’s in electrical engineering, Computer Engineering or Computer Science.

Experience Required

Minimum of 10 years of proven silicon design experience in ASIC Implementation

Beneficial Experience

FPGA and ASIC System On Chip Design Experience

Travel Time:

0% - 25%

Physical Attributes:

Hearing, Seeing, Talking, Works Alone, Works Around Others

Physical Requirements:

90% Sitting, 10% Walking/Standing

Microchip Technology Inc is an equal opportunity/affirmative action employer. All qualified applicants will receive consideration for employment without regard to sex, gender identity, sexual orientation, race, color, religion, national origin, disability, protected Veteran status, age, or any other characteristic protected by law.

For more information on applicable equal employment regulations, please refer to the EEO is the Law Poster and the EEO is the Law Poster Supplement. Please also refer to the Pay Transparency Policy Statement.